Flip chip is a method for interconnecting semiconductor devices, such as IC chips and microelectromechanical systems (MEMS), to external circuitry with solder bumps that have been deposited onto the chip pads. The solder bumps are deposited on the chip pads on the top side of the wafer during the final wafer processing step. In order to mount the chip to external circuitry (e.g., a circuit board or another chip or wafer), the chip is flipped over so that its top side faces down, and aligned so that its pads align with matching pads on the external circuit, and then the solder is reflowed to complete the interconnect.
FIG. 1 illustrates a conventional printed circuit board (PCB) routing to a flip-chip mounted device. Copper traces of the PCB (not shown) for source and drain electrodes of a transistor, for example, are attached to the flip chip by aligning device solder with the copper traces to form a plurality of contact points. Current is provided to the device from the drain and device solder adjacent the electrode and current flows out the device from the device solder adjacent the source as would be understood to one skilled in the art.
FIGS. 2A and 2B illustrate a conventional layout for attaching a flip-chip die to a PCB. Current flows into and out of the device through top layer copper fingers 72 on the PCB (not shown). The device solder bumps 74 mate to the copper fingers 72 and facilitate current flowing to and from the device. A primary disadvantage of this design is that current transitions from the copper fingers 72 into solder bump 74 non-uniformly across the copper-solder interface. The non-uniform transfer of current into solder results in regions of high current density beyond the electromigration limit of the solder-copper interface, which, in turn results in reliability limits to the device's performance.
FIGS. 3A, 3B and 3C illustrate another conventional layout for attaching a flip-chip die to a PCB. The design illustrated in FIGS. 3A through 3C is similar to the prior art design discussed above except that multiple layers 72A, 72B of copper fingers 72 are provided to carry current to and from the device solder bump 74. This design also results in current density that is beyond the electromigration limit near the edge of the solder bump 74. As shown in FIG. 3B, a problem area (i.e., high current density) is at the solder-copper interface.
FIGS. 4A and 4B illustrate another conventional layout for attaching a flip-chip die to a PCB that attempts to overcome the current density limitations discussed above. As shown in FIG. 4A, multiple layers 76A, 76B of copper fingers are provided to carry current to and from the device solder contact 74. In this design, the thickness of the second copper layer 76A is increased to approximately 72 μm (2 oz). With this design, peak current density is reduced, but test results demonstrate that there is still an unacceptable current density where the solder contacts the first copper layer 76B.
Accordingly, a flip chip interconnection design and configuration is needed that significantly reduces current density at the solder-copper interface.